MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 493

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

0x3_C2C0–0x3_C2FF PKEU parameter memory A3
0x3_C3C0–0x3_C3FF PKEU parameter memory B3
Freescale Semiconductor
0x3_C280–0x3_C2BF PKEU parameter memory A2
0x3_C380–0x3_C3BF PKEU parameter memory B2
0x3_C400–0x3_C4FF PKEU parameter memory E
0x3_C800–0x3_C8FF PKEU parameter memory N
0x3_C200–0x3_C23F PKEU parameter memory A0
0x3_C240–0x3_C27F PKEU parameter memory A1
0x3_C300–0x3_C33F PKEU parameter memory B0
0x3_C340–0x3_C37F PKEU parameter memory B1
Address Offset
(AD 17–0)
0x3_C018
0x3_C028
0x3_C030
0x3_C038
0x3_C040
0x3_C050
0x3_E000
0x3_E008
0x3_E010
0x3_E018
0x3_E028
0x3_E030
0x3_E038
0x3_E048
0x3_E050
0x3_E100
0x3_E108
0x3_E110
0x3_E118
0x3_E120
0x3_E128
0x3_E130
0x3_E138
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
PKEURCR—PKEU reset control register
PKEUSR—PKEU status register
PKEUISR—PKEU interrupt status register
PKEUICR—PKEU interrupt control
register
PKEUABS—PKEU AB size register
PKEUEUG—PKEU EU go register
KEUMR—KEU mode register
KEUKSR—KEU key size register
KEUDSR—KEU data size register
KEURCR—KEU reset control register
KEUSR—KEU status register
KEUISR—KEU interrupt status register
KEUICR—KEU interrupt control register
KEUDOR—KEU data out register
(F9 MAC)
KEUEUG—KEU EU go register
KEUIV1—KEU initialization vector 1
register
KEUICV—KEU ICV_In register
KEUIV2—KEU initialization vector 2
register (Fresh)
KEUC1—KEU context_1 register
KEUC2—KEU context_2 register
KEUC3—KEU context_3 register
KEUC4—KEU context_4 register
KEUC5—KEU context_5 register
Table 12-3. SEC Address Map (continued)
Register
Kasumi Execution Unit (KEU)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
R
R
R
R
0x0000_0000_0000_0000
0x0000_0000_0000_1000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_1000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
Reset
Security Engine (SEC) 2.1
12.4.1.10/12-32
12.4.1.10/12-32
12.4.1.10/12-32
12.4.1.10/12-32
12.4.1.10/12-32
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12.4.1.10/12-32
12.4.7.10/12-88
12.4.7.11/12-88
12.4.7.12/12-89
12.4.7.13/12-89
12.4.7.13/12-89
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12.4.7.13/12-89
12.4.1.5/12-29
12.4.1.6/12-29
12.4.1.7/12-30
12.4.1.8/12-31
12.4.1.3/12-28
12.4.1.9/12-32
12.4.7.1/12-80
12.4.7.2/12-81
12.4.7.3/12-81
12.4.7.4/12-82
12.4.7.5/12-83
12.4.7.6/12-84
12.4.7.7/12-85
12.4.7.8/12-87
12.4.7.9/12-87
Reference
12-15