OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 11
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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4.1 How to read this chapter
4.2 Introduction
4.3 Pin description
4.4 General description
UM10441
User manual
The system control block is identical on all LPC122x parts.
The system configuration block controls oscillators, start logic, and clock generation of the
LPC122x. Also included in this block are registers for setting the priority for AHB access
and a register for remapping flash, SRAM, and ROM memory areas.
Table 5
Table 5.
See
Following reset, the LPC122x will operate from the Internal RC oscillator until switched by
software. This allows systems to operate without any external crystal and the boot loader
code to operate at a known frequency.
The SYSAHBCLKCTRL register gates the system clock to the various peripherals and
memories. UART0/1, SSP, the RTC, and the SysTick timer have individual clock dividers
to derive peripheral clocks from the main clock.
The watchdog clock can be derived from the oscillator output or the main clock.
The main clock, and the clock outputs from the IRC, the system oscillator, and the
watchdog oscillator can be observed directly on the CLKOUT pin.
Pin name
CLKOUT
PIO0_0 to PIO0_11
UM10441
Chapter 4: LPC122x System control (SYSCON)
Rev. 1 — 15 February 2011
Figure 3
shows pins that are associated with system control block functions.
Pin summary
for an overview of the LPC122x Clock Generation Unit (CGU).
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Pin direction
O
I
Pin description
Clockout pin
Start logic wake-up pins port 0
© NXP B.V. 2011. All rights reserved.
User manual
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