OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 123
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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Table 118. LPC122x pin description
UM10441
User manual
Symbol
PIO0_16/MISO/
CT16B1_CAP1/
CT16B1_MAT1
PIO0_17/MOSI
PIO0_18/SWCLK/
CT32B0_CAP0/
CT32B0_MAT0
PIO0_19/ACMP0_I0/
CT32B0_CAP1/
CT32B0_MAT1
PIO0_20/ACMP0_I1/
CT32B0_CAP2/
CT32B0_MAT2
PIO0_21/ACMP0_I2/
CT32B0_CAP3/
CT32B0_MAT3
PIO0_22/ACMP0_I3
PIO0_23/
ACMP1_I0/
CT32B1_CAP0/
CT32B1_MAT0
PIO0_24/ACMP1_I1/
CT32B1_CAP1/
CT32B1_MAT1
SWDIO/ACMP1_I2/
CT32B1_CAP2/
CT32B1_MAT2/
PIO0_25
31 43
32 44
33 45
4
5
6
7
8
9
10 10
4
5
6
7
8
9
[2]
[2]
[2]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
Start
logic
input
no
no
no
no
no
no
no
no
no
no
…continued
All information provided in this document is subject to legal disclaimers.
Type Reset
I/O
I/O
I
O
I/O
I/O
I/O
I
I
O
I/O
I
I
O
I/O
I
I
O
I/O
I
I
O
I/O
I
I/O
I
I
O
I/O
I
I
O
I/O
I
I
O
I/O
Rev. 1 — 15 February 2011
state
[1]
I; PU
-
-
-
I; PU
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
-
Description
PIO0_16 — General purpose digital input/output pin.
MISO — Master In Slave Out for SSP/SPI.
CT16B1_CAP1 — Capture input, channel 1 for 16-bit timer 1.
CT16B1_MAT1 — Match output, channel 1 for 16-bit timer 1.
PIO0_17 — General purpose digital input/output pin.
MOSI — Master Out Slave In for SSP/SPI.
PIO0_18 — General purpose digital input/output pin.
SWCLK — Serial wire clock, alternate location.
CT32B0_CAP0 — Capture input, channel 0 for 32-bit timer 0.
CT32B0_MAT0 — Match output, channel 0 for 32-bit timer 0.
PIO0_19 — General purpose digital input/output pin.
ACMP0_I0 — Input 0 for comparator 0.
CT32B0_CAP1 — Capture input, channel 1 for 32-bit timer 0.
CT32B0_MAT1 — Match output, channel 1 for 32-bit timer 0
PIO0_20 — General purpose digital input/output pin.
ACMP0_I1 — Input 1 for comparator 0.
CT32B0_CAP2 — Capture input, channel 2 for 32-bit timer 0.
CT32B0_MAT2 — Match output, channel 2 for 32-bit timer 0.
PIO0_21 — General purpose digital input/output pin.
ACMP0_I2 — Input 2 for comparator 0.
CT32B0_CAP3 — Capture input, channel 3 for 32-bit timer 0.
CT32B0_MAT3 — Match output, channel 3 for 32-bit timer 0.
PIO0_22 — General purpose digital input/output pin.
ACMP0_I3 — Input 3 for comparator 0.
PIO0_23 — General purpose digital input/output pin.
ACMP1_I0 — Input 0 for comparator 1.
CT32B1_CAP0 — Capture input, channel 0 for 32-bit timer 1.
CT32B1_MAT0 — Match output, channel 0 for 32-bit timer 1.
PIO0_24 — General purpose digital input/output pin.
ACMP1_I1 — Input 1 for comparator 1.
CT32B1_CAP1 — Capture input, channel 1 for 32-bit timer 1.
CT32B1_MAT1 — Match output, channel 1 for 32-bit timer 1.
SWDIO — Serial wire debug input/output, default location.
ACMP1_I2 — Input 2 for comparator 1.
CT32B1_CAP2 — Capture input, channel 2 for 32-bit timer 1.
CT32B1_MAT2 — Match output, channel 2 for 32-bit timer 1.
PIO0_25 — General purpose digital input/output pin.
Chapter 7: LPC122x Pin configuration
UM10441
© NXP B.V. 2011. All rights reserved.
123 of 442
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