OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 192

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
When the slave address and data direction bit have been transmitted and an
acknowledge bit has been received, the SI bit is set, and the Status Register will show the
status code. For master mode, the possible status codes are 0x40, 0x48, or 0x38. For
slave mode, the possible status codes are 0x68, 0x78, or 0xB0. For details, refer to
Table
When the LPC122x needs to acknowledge a received byte, the AA bit needs to be set
accordingly prior to clearing the SI bit and initiating the byte read. When the LPC122x
needs to not acknowledge a received byte, the AA bit needs to be cleared prior to clearing
the SI bit and initiating the byte read.
Note that the last received byte is always followed by a "Not Acknowledge" from the
LPC122x so that the master can signal the slave that the reading sequence is finished
and that it needs to issue a STOP or repeated START Command. Once the "Not
Acknowledge has been sent and the SI bit is set, the LPC122x can send either a STOP
(STO bit is set) or a repeated START (STA bit is set). Then the SI bit is cleared to initiate
the requested operation.
After a repeated START condition, I
Fig 15. Format of Master Receiver mode
Fig 16. A Master Receiver switches to Master Transmitter after sending repeated START
S
S
from Master to Slave
from Slave to Master
200.
From master to slave
From slave to master
SLA
SLAVE ADDRESS
R
All information provided in this document is subject to legal disclaimers.
A
Rev. 1 — 15 February 2011
DATA
n bytes data transmitted
RW=1
A
2
C may switch to the master transmitter mode.
A
DATA
A
DATA
Chapter 11: LPC122x I2C-bus controller
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
Sr
SLA
n bytes data received
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
SLA = Slave Address
Sr = Repeated START condition
A
W
DATA
A
UM10441
© NXP B.V. 2011. All rights reserved.
DATA
A
A
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P
P