OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 361

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
See the instruction descriptions
information about how to access the program status registers.
Application Program Status Register:
condition flags, from previous instruction executions. See the register summary in
Table 25–353
Table 355. APSR bit assignments
See
borrow, and overflow flags.
Interrupt Program Status Register:
current Interrupt Service Routine (ISR). See the register summary in
its attributes. The bit assignments are:
Table 356. IPSR bit assignments
Execution Program Status Register:
See the register summary in
are:
Bits
[31]
[30]
[29]
[28]
[27:0]
Bits
[31:6]
[5:0]
Section 25.4.4.1.4
for its attributes. The bit assignments are:
All information provided in this document is subject to legal disclaimers.
Name
N
Z
C
V
-
Name
-
Exception number This is the number of the current exception:
Rev. 1 — 15 February 2011
for more information about the APSR negative, zero, carry or
Table 25–353
Section 25–25.4.7.6
Function
Negative flag
Zero flag
Carry or borrow flag
Overflow flag
Reserved
Function
Reserved
0 = Thread mode
1 = Reserved
2 = NMI
3 = HardFault
4-10 = Reserved
11 = SVCall
12, 13 = Reserved
14 = PendSV
15 = SysTick
16 = IRQ0
.
.
.
47 = IRQ31
48-63 = Reserved.
see
The IPSR contains the exception number of the
Chapter 25: LPC122x Appendix ARM Cortex-M0
The EPSR contains the Thumb state bit.
Section 25–25.3.3.2
The APSR contains the current state of the
for the EPSR attributes. The bit assignments
and
Section 25–25.4.7.7
for more information.
UM10441
Table 25–353
© NXP B.V. 2011. All rights reserved.
for more
361 of 442
for