OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 23

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
Table 21.
Bit
7
8
9
10
11
12
13
14
15
16
17
18
Symbol
CT16B0
CT16B1
CT32B0
CT32B1
SSP
UART0
UART1
ADC
WDT
IOCON
DMA
-
System AHB clock control register (SYSAHBCLKCTRL, address 0x4004 8080) bit
description
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
…continued
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
Enables clock for 16-bit counter/timer 0.
Disable
Enable
Enables clock for 16-bit counter/timer 1.
Disable
Enable
Enables clock for 32-bit counter/timer 0.
Disable
Enable
Enables clock for 32-bit counter/timer 1.
Disable
Enable
Enables clock for SSP.
Disable
Enable
Enables clock for UART0. Note that the UART0 pins
must be configured in the IOCON block before the
UART0 clock can be enabled.
Disable
Enable
Enables clock for UART1. Note that the UART1 pins
must be configured in the IOCON block before the
UART1 clock can be enabled.
Disable
Enable
Enables clock for ADC.
Disable
Enable
Enables clock for WDT.
Disable
Enable
Enables clock for IO configuration block.
Disable
Enable
Enables clock for micro DMA.
Disable
Enable
Reserved. Write as zero.
Chapter 4: LPC122x System control (SYSCON)
UM10441
© NXP B.V. 2011. All rights reserved.
23 of 442
Reset
value
1
1
1
1
1
1
1
1
1
1
1
1