OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 399
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
25.4.5.7.4 Condition flags
25.4.5.7.5 Examples
25.4.5.8.1 Syntax
25.4.5.8.2 Operation
25.4.5.8.3 Restrictions
25.4.5.8.4 Condition flags
25.4.5.8.5 Examples
25.4.5.8 SXT and UXT
25.4.5.9 TST
These instructions do not change the flags.
Sign extend and Zero extend.
SXTB Rd, Rm
SXTH Rd, Rm
UXTB Rd, Rm
UXTH Rd, Rm
where:
These instructions extract bits from the resulting value:
In these instructions, Rd and Rm must only specify R0-R7.
These instructions do not affect the flags.
Test bits.
•
•
•
•
Rd is the destination register.
Rm is the register holding the value to be extended.
SXTB extracts bits[7:0] and sign extends to 32 bits
UXTB extracts bits[7:0] and zero extends to 32 bits
SXTH extracts bits[15:0] and sign extends to 32 bits
UXTH extracts bits[15:0] and zero extends to 32 bits.
REV
SXTH R4, R6
REV16 R0, R0 ; Reverse byte order of each 16-bit halfword in R0
REVSH R0, R5 ; Reverse signed halfword
UXTB R3, R1
R3, R7 ; Reverse byte order of value in R7 and write it to R3
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
; Obtain the lower halfword of the
; value in R6 and then sign extend to
; 32 bits and write the result to R4.
; Extract lowest byte of the value in R10 and zero
; extend it, and write the result to R3
Chapter 25: LPC122x Appendix ARM Cortex-M0
UM10441
© NXP B.V. 2011. All rights reserved.
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