OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 199
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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11.10 Details of I
UM10441
User manual
The four operating modes are:
Data transfers in each mode of operation are shown in
Figure
describing the I
Table 196. Abbreviations used to describe an I
In
The numbers in the circles show the status code held in the STAT register. At these points,
a service routine must be executed to continue or complete the serial transfer. These
service routines are not critical since the serial transfer is suspended until the serial
interrupt flag is cleared by software.
When a serial interrupt routine is entered, the status code in STAT is used to branch to the
appropriate service routine. For each status code, the required software action and details
of the following serial transfer are given in tables from
Abbreviation
S
SLA
R
W
A
A
Data
P
Sr
•
•
•
•
2
Figure 22
C operating modes
Master Transmitter
Master Receiver
Slave Receiver
Slave Transmitter
25, and
to
Figure
Figure
2
All information provided in this document is subject to legal disclaimers.
C operating modes.
Rev. 1 — 15 February 2011
26.
26, circles are used to indicate when the serial interrupt flag is set.
Explanation
START condition
7-bit slave address
Read bit (HIGH level at SDA)
Write bit (LOW level at SDA)
Acknowledge bit (LOW level at SDA)
Not acknowledge bit (HIGH level at SDA)
8-bit data byte
STOP condition
Repeated START condition
Table 196
lists abbreviations used in these figures when
2
C operation
Chapter 11: LPC122x I2C-bus controller
Table 199
Figure
22,
to
Figure
Table
UM10441
© NXP B.V. 2011. All rights reserved.
23,
203.
Figure
199 of 442
24,
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