OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 270
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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15.1 How to read this chapter
15.2 Basic configuration
15.3 Features
15.4 General description
UM10441
User manual
The system tick timer (SysTick timer) is part of the ARM Cortex-M0 core and is identical
for all LPC122x parts.
The system tick timer is configured using the following registers:
The block diagram of the SysTick timer is shown below in the
The SysTick timer is an integral part of the Cortex-M0. The SysTick timer is intended to
generate a fixed 10 millisecond interrupt for use by an operating system or other system
management software.
1. Pins: The system tick timer uses no external pins.
2. Power: The system tick timer is enabled through the SysTick control register
Fig 45. System tick timer block diagram
•
•
•
UM10441
Chapter 15: LPC122x System Tick (SysTick) timer
Rev. 1 — 15 February 2011
(Section
system clock.
Simple 24-bit timer.
Uses dedicated exception vector.
Clocked internally by the system clock.
15.5.1). The system tick timer clock is fixed to half the frequency of the
All information provided in this document is subject to legal disclaimers.
system clock
Rev. 1 — 15 February 2011
COUNTFLAG
clock
24-bit down counter
load
SYST_CALIB
SYST_RVR
SYST_CVR
SYST_CSR
load data
under -
flow
TICKINT
enable
count
ENABLE
System Tick
interrupt
peripheral
Figure
private
bus
45.
© NXP B.V. 2011. All rights reserved.
User manual
270 of 442
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