OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 133
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
8.3.5 GPIO pin output clear register
8.3.6 GPIO NOT register
Table 125. GPIO pin output set register (SET - address 0x5000 000C (GPIO0), 0x5001 000C
This register is used to produce a LOW level output at the port pins configured as GPIO
output in the DIR register (see
register (see
effect on the GPIO output level. If a pin is not configured as GPIO and output, the CLR
register has no effect on the pin level.
This register is a write-only register. Note that write operations to the CLR register are
masked by the MASK register.
Table 126. GPIO pin output clear register (CLR - address 0x5000 0010 (GPIO0), 0x5000 1010
This register is used to invert the output level at the port pins configured as GPIO output in
the DIR register (see
(see
GPIO output level. If a pin is not configured as GPIO and output, the NOT register has no
effect on the pin level.
This register is a write-only register. Note that write operations to the NOT register are
masked by the MASK register.
Table 127. GPIO NOT register (NOT - address 0x5000 0014 (GPIO0), 0x5001 0014 (GPIO1),
Bit
31:0
Bit
31:0
Bit
31:0
Table
Symbol
SET
Symbol
CLEAR
Symbol
NOT
(GPIO1), 0x5002 000C (GPIO2)) bit description
(GPIO1), 0x5002 0010 (GPIO2)) bit description
0x5002 0014 (GPIO2)) bit description
60). Writing 1 inverts the corresponding port pin. Writing 0 has no effect on the
Table
All information provided in this document is subject to legal disclaimers.
Description
Set GPIO pin PIOn_x output value.
0 = No effect on the GPIO output level.
1 = GPIO output is set to HIGH.
Description
0 = No effect on the GPIO output level.
1 = GPIO output is set to LOW.
Description
Invert GPIO pin PIOn_x output value.
0 = No effect on the GPIO output level.
1 = GPIO output is inverted from its current value.
Clear GPIO pin PIOn_x output value.
60). Writing 1 sets the corresponding port pin to LOW. Writing 0 has no
Table
Rev. 1 — 15 February 2011
128) and as GPIO in the corresponding IOCONFIG register
Table
128) and as GPIO in the corresponding IOCONFIG
Chapter 8: LPC122x General Purpose I/O (GPIO)
UM10441
© NXP B.V. 2011. All rights reserved.
Reset
value
0x00
Reset
value
0x00
Reset
value
0x00
Access
W
Access
-
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