OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 310

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
20.7 ISP commands
UM10441
User manual
20.7.1 Unlock <Unlock code>
The following commands are accepted by the ISP command handler. Detailed status
codes are supported for each command. The command handler sends the return code
INVALID_COMMAND when an undefined command is received. Commands and return
codes are in ASCII format.
CMD_SUCCESS is sent by ISP command handler only when the received ISP command
has been completely executed and the new ISP command can be given by the host.
Exceptions from this rule are "Set Baud Rate", "Write to RAM", "Read Memory", and "Go"
commands.
Table 289. ISP command summary
Table 290. ISP Unlock command
ISP Command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Prepare sector(s) for
write operation
Copy RAM to flash
Go
Erase sector(s)
Blank check sector(s)
Read Part ID
Read Boot code version K
Compare
ReadUID
Command
Input
Return Code
Description
Example
U
Unlock code: 23130 (decimal)
CMD_SUCCESS |
INVALID_CODE |
PARAM_ERROR
This command is used to unlock Flash Write, Erase, and Go commands.
"U 23130<CR><LF>" unlocks the Flash Write/Erase, and Go commands.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Usage
U <Unlock Code>
B <Baud Rate> <stop bit>
A <setting>
W <start address> <number of bytes>
R <address> <number of bytes>
P <start sector number> <end sector number>
C <Flash address> <RAM address> <number of bytes>
G <address> <Mode>
E <start sector number> <end sector number>
I <start sector number> <end sector number>
J
M <address1> <address2> <number of bytes>
N
Chapter 20: LPC122x Flash ISP/IAP
UM10441
© NXP B.V. 2011. All rights reserved.
Described in
Table 290
Table 291
Table 292
Table 293
Table 294
Table 295
Table 296
Table 297
Table 298
Table 299
Table 300
Table 302
Table 303
Table 304
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