OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 219
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
11.11.7.2 State: 0x48
11.11.7.3 State: 0x50
11.11.7.4 State: 0x58
11.11.8.1 State: 0x60
11.11.8 Slave Receiver states
Slave Address + Read has been transmitted, NOT ACK has been received. A STOP
condition will be transmitted.
Data has been received, ACK has been returned. Data will be read from DAT. Additional
data will be received. If this is the last data byte then NOT ACK will be returned, otherwise
ACK will be returned.
Data has been received, NOT ACK has been returned. Data will be read from DAT. A
STOP condition will be transmitted.
Own Slave Address + Write has been received, ACK has been returned. Data will be
received and ACK returned.
3. Exit
1. Write 0x14 to CONSET to set the STO and AA bits.
2. Write 0x08 to CONCLR to clear the SI flag.
3. Exit
1. Read data byte from DAT into Master Receive buffer.
2. Decrement the Master data counter, skip to step 5 if not the last data byte.
3. Write 0x0C to CONCLR to clear the SI flag and the AA bit.
4. Exit
5. Write 0x04 to CONSET to set the AA bit.
6. Write 0x08 to CONCLR to clear the SI flag.
7. Increment Master Receive buffer pointer
8. Exit
1. Read data byte from DAT into Master Receive buffer.
2. Write 0x14 to CONSET to set the STO and AA bits.
3. Write 0x08 to CONCLR to clear the SI flag.
4. Exit
1. Write 0x04 to CONSET to set the AA bit.
2. Write 0x08 to CONCLR to clear the SI flag.
3. Set up Slave Receive mode data buffer.
4. Initialize Slave data counter.
5. Exit
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Chapter 11: LPC122x I2C-bus controller
UM10441
© NXP B.V. 2011. All rights reserved.
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