OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 277

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
16.5 Functional description
UM10441
User manual
16.4.8 RTC interrupt clear register
16.5.1 Using the RTC in Deep-sleep or Deep power-down modes
This register is a WO register. Writing one clears the corresponding interrupt. Writing zero
has no effect.
Table 262. RTC interrupt clear register (ICR - address 0x4005 001C) bit description
The RTC can be configured to wake up the chip from Deep-sleep or Deep power-down
modes when the RTC interrupt is raised. For details, see
Always select one of the outputs of the RTC oscillator as RTC clock input if the RTC is
used to keep time in Deep-sleep or Deep power-down modes.
Remark: To obtain a valid RTC value after waking up from Deep power-down, first
perform a “dummy” read on the RTC. The next read contains the updated RTC value.
Bit
0
31:1
Symbol
RTCICR
-
All information provided in this document is subject to legal disclaimers.
Description
Raw interrupt event flag clear register. Writing one clears
the interrupt event flag. Writing 0 has no effect.
Reserved. Write as zero.
Rev. 1 — 15 February 2011
Chapter 16: LPC122x Real-Time Clock (RTC)
Section 4.8.3
UM10441
© NXP B.V. 2011. All rights reserved.
and
Reset value
0x0
0x0
Section
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4.9.2.