OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 390

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
25.4.4.5.5 Examples
25.4.4.5.6 Incorrect examples
25.4.4.6.1 Syntax
25.4.4.6.2 Operation
25.4.4.6.3 Restrictions
25.4.4.6.4 Condition flags
25.4.4.6 PUSH and POP
Push registers onto, and pop registers off a full-descending stack.
PUSH reglist
POP reglist
where:
PUSH stores registers on the stack, with the lowest numbered register using the lowest
memory address and the highest numbered register using the highest memory address.
POP loads registers from the stack, with the lowest numbered register using the lowest
memory address and the highest numbered register using the highest memory address.
PUSH uses the value in the SP register minus four as the highest memory address,
POP uses the value in the SP register as the lowest memory address, implementing a
full-descending stack. On completion,
PUSH updates the SP register to point to the location of the lowest store value,
POP updates the SP register to point to the location above the highest location loaded.
If a POP instruction includes PC in its reglist, a branch to this location is performed when
the POP instruction has completed. Bit[0] of the value read for the PC is used to update
the APSR T-bit. This bit must be 1 to ensure correct operation.
In these instructions:
These instructions do not change the flags.
•
•
reglist is a non-empty list of registers, enclosed in braces. It can contain register ranges.
It must be comma separated if it contains more than one register or register range.
reglist must use only R0-R7.
The exception is LR for a PUSH and PC for a POP.
LDM
STM
STMIA
LDM
R0,{R0,R3,R4}
R5!,{R4,R5,R6} ; Value stored for R5 is unpredictable
All information provided in this document is subject to legal disclaimers.
R1!,{R2-R4,R6}
R2,{}
Rev. 1 — 15 February 2011
; LDMIA is a synonym for LDM
; There must be at least one register in the list
Chapter 25: LPC122x Appendix ARM Cortex-M0
UM10441
© NXP B.V. 2011. All rights reserved.
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