OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 32

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
4.5.32 Start logic reset register 0
Table 38.
Writing a one to a bit in the STARTRSRP0CLR register resets the start logic state. The bit
assignment is identical to
clock edge for registering a start signal. This clock edge (falling or rising) sets the interrupt
for waking up from Deep-sleep mode. Therefore, the start-up logic states must be cleared
before being used.
Bit
3
4
5
6
7
8
9
10
11
31:12 -
Symbol
ERPIO0_3
ERPIO0_4
ERPIO0_5
ERPIO0_6
ERPIO0_7
ERPIO0_8
ERPIO0_9
ERPIO0_10
ERPIO0_11
Start logic signal enable register 0 (STARTERP0, address 0x4004 8204) bit
description
All information provided in this document is subject to legal disclaimers.
Description
Enable start signal for start logic input n for pin PIO0_3.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_4.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_5.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_6.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_7.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_8.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_9.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_10.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic input n for pin PIO0_11.
0 = Disabled.
1 = Enabled.
Reserved
Rev. 1 — 15 February 2011
…continued
Table
37. The start-up logic uses the input signals to generate a
Chapter 4: LPC122x System control (SYSCON)
UM10441
© NXP B.V. 2011. All rights reserved.
32 of 442
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Reset
value
0
0
0
0
0
0
0
0
0