OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 292

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
18.7 Functional description
UM10441
User manual
Fig 50. Comparator block diagram
C0_IN[0:5]
CMP0_LEVEL
C1_IN[0:5
VREF CMP
0.9 V
18.7.1 Input multiplexer
32
E X N
6
6
6
The two comparators each have 8 inputs multiplexed separately to both their positive and
negative inputs. The multiplexers for each comparator (both positive and negative inputs)
are all controlled by the comparator register CMP (see
The remaining 6 comparator inputs for the positive and negative sides of the comparators
come from external chip IO pins. However due to a limitation on availability, only four IO
pins are dedicated for each comparator. The two remaining inputs for each comparator
can be selected from alternate comparators inputs if desired; ACMP0_I0 and ACMP0_I1
can be selected for ACMP1_I4 and ACMP1_I5 input sources respectively, similarly
ACMP1_I0 and ACMP1_I1 can selected for ACMP0_I4 and ACMP0_I5 input sources
respectively (see
ANALOG LOGIC
Bit 0 of the positive and negative inputs on each comparator can be selected to derive
from a programmable voltage ladder output.
Bit 7 of the positive and negative inputs on each comparator can be selected that drives
from the on-chip bandgap voltage.
14
APB INTERFACE
CMP_REG
VLAD_REG
APB REGISTERS
All information provided in this document is subject to legal disclaimers.
Figure
7
Rev. 1 — 15 February 2011
PCLK
51)
DIGITAL LOGIC
sync
S
R
S
R
edge detect
Chapter 18: LPC122x Comparator
Figure 50
and
Table
UM10441
© NXP B.V. 2011. All rights reserved.
CMP0_LEVEL
CMP1_LEVEL
C0_OUT
C1_OUT
CMP0_EDGE
CMP1_EDGE
ROSC
274).
INT
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