OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 163

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
10.5.4 UART Interrupt Enable Register (when DLAB = 0)
Table 164. UART Divisor Latch LSB Register (DLL - address 0x4000 C000 when DLAB = 1)
Table 165. UART Divisor Latch MSB Register (DLM - address 0x4000 C004 when DLAB = 1)
The IER is used to enable the four UART interrupt sources.
Table 166. UART Interrupt Enable Register (IER - address 0x4000 C004 when DLAB = 0) bit
Bit
7:0
31:8 -
Bit
7:0
31:8 -
Bit
0
1
2
3
6:4
7
8
Symbol
DLLSB
Symbol
DLMSB
Symbol
RBRIE
THREIE
RXIE
-
-
-
ABEOINTEN
bit description
bit description
description
All information provided in this document is subject to legal disclaimers.
Description
The UART Divisor Latch LSB Register, along with the DLM
register, determines the baud rate of the UART.
Reserved
Description
The UART Divisor Latch MSB Register, along with the DLL
register, determines the baud rate of the UART.
Reserved
Rev. 1 — 15 February 2011
Value
0
1
0
1
0
1
0
1
-
-
Description
Available interrupt for UART. It also controls the
Character Receive Time-out interrupt.
Disable the RDA interrupts.
Enable the RDA interrupts.
for UART. The status of this interrupt can be read from
LSR[5].
Disable the THRE interrupts.
Enable the THRE interrupts.
status interrupts. The status of this interrupt can be
read from LSR[4:1].
Reserved
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Reserved
Enables the end of auto-baud interrupt.
Enable end of auto-baud Interrupt.
RBR Interrupt Enable. Enables the Receive Data
THRE Interrupt Enable. Enables the THRE interrupt
RX Line Interrupt Enable. Enables the UART RX line
Disable the RX line status interrupts.
Enable the RX line status interrupts.
Disable end of auto-baud Interrupt.
Chapter 10: LPC122x UART1
UM10441
© NXP B.V. 2011. All rights reserved.
Reset value
0x01
-
Reset value
0x00
-
163 of 442
Reset
value
0
0
0
-
NA
0
0