OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 211

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
Table 202. Slave Transmitter mode
UM10441
User manual
STAT
Status
Code
0xA8
0xB0
0xB8
0xC0
0xC8
Status of the I
and hardware
Own SLA+R has been
received; ACK has
been returned.
Arbitration lost in
SLA+R/W as master;
Own SLA+R has been
received, ACK has
been returned.
Data byte in DAT has
been transmitted; ACK
has been received.
Data byte in DAT has
been transmitted; NOT
ACK has been
received.
Last data byte in DAT
has been transmitted
(AA = 0); ACK has
been received.
2
C-bus
Load data byte or
Load data byte
No DAT action or
No DAT action or
No DAT action or
No DAT action
No DAT action or
No DAT action or
No DAT action or
No DAT action
Application software response
To/From DAT
Load data byte or
Load data byte
Load data byte or
Load data byte
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
To CON
STA STO SI
X
X
X
X
X
X
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
01
Chapter 11: LPC122x I2C-bus controller
Next action taken by I
bit will be received.
received.
bit will be received.
be received.
bit will be received.
be received.
Switched to not addressed SLV mode; no
recognition of own SLA or General Call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General Call
address will be recognized if
ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General Call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General Call
address will be recognized if
ADR[0] = logic 1. A START condition will
be transmitted when the bus becomes free.
Switched to not addressed SLV mode; no
recognition of own SLA or General Call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General Call
address will be recognized if
ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General Call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General Call
address will be recognized if ADR.0 = logic
1. A START condition will be transmitted
when the bus becomes free.
Last data byte will be transmitted and ACK
Data byte will be transmitted; ACK will be
Last data byte will be transmitted and ACK
Data byte will be transmitted; ACK bit will
Last data byte will be transmitted and ACK
Data byte will be transmitted; ACK bit will
UM10441
2
© NXP B.V. 2011. All rights reserved.
C hardware
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