OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 379

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
25.4.2 Intrinsic functions
Table 363. Cortex-M0 instructions
ISO/IEC C code cannot directly access some Cortex-M0 instructions. This section
describes intrinsic functions that can generate these instructions, provided by the CMSIS
and that might be provided by a C compiler. If a C compiler does not support an
appropriate intrinsic function, you might have to use inline assembler to access the
relevant instruction.
The CMSIS provides the following intrinsic functions to generate instructions that ISO/IEC
C code cannot directly access:
Table 364. CMSIS intrinsic functions to generate some Cortex-M0 instructions
Mnemonic Operands
STR
STRB
STRH
SUB{S}
SVC
SXTB
SXTH
TST
UXTB
UXTH
WFE
WFI
Instruction
CPSIE i
CPSID i
ISB
DSB
DMB
NOP
REV
REV16
REVSH
Rt, [Rn, <Rm|#imm>] Store Register as word
Rt, [Rn, <Rm|#imm>] Store Register as byte
Rt, [Rn, <Rm|#imm>] Store Register as halfword
{Rd,} Rn,
<Rm|#imm>
#imm
Rd, Rm
Rd, Rm
Rn, Rm
Rd, Rm
Rd, Rm
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Brief description
Subtract
Supervisor Call
Sign extend byte
Sign extend halfword
Logical AND based test
Zero extend a byte
Zero extend a halfword
Wait For Event
Wait For Interrupt
Chapter 25: LPC122x Appendix ARM Cortex-M0
CMSIS intrinsic function
void __enable_irq(void)
void __disable_irq(void)
void __ISB(void)
void __DSB(void)
void __DMB(void)
void __NOP(void)
uint32_t __REV(uint32_t int value)
uint32_t __REV16(uint32_t int value)
uint32_t __REVSH(uint32_t int value)
Flags
-
-
-
N,Z,C,V
-
-
-
N,Z
-
-
-
-
UM10441
© NXP B.V. 2011. All rights reserved.
Reference
Section 25–25.4.4
Section 25–25.4.4
Section 25–25.4.4
Section 25–25.4.5
.1
Section 25–25.4.7
.10
Section 25–25.4.5
.8
Section 25–25.4.5
.8
Section 25–25.4.5
.9
Section 25–25.4.5
.8
Section 25–25.4.5
.8
Section 25–25.4.7
.11
Section 25–25.4.7
.12
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