OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 422
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
25.5.4.5 SysTick usage hints and tips
Table 395. SYST_CALIB register bit assignments
If calibration information is not known, calculate the calibration value required from the
frequency of the processor clock or external clock.
The interrupt controller clock updates the SysTick counter.
Ensure software uses word accesses to access the SysTick registers.
If the SysTick counter reload and current value are undefined at reset, the correct
initialization sequence for the SysTick counter is:
Bits
[31]
[30]
[29:24]
[23:0]
1. Program reload value.
2. Clear current value.
3. Program Control and Status register.
Name
NOREF
SKEW
-
TENMS
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Function
Reads as one. Indicates that no separate reference clock is provided.
Reads as one. Calibration value for the 10ms inexact timing is not known
because TENMS is not known. This can affect the suitability of SysTick
as a software real time clock.
Reserved.
Reads as zero. Indicates calibration value is not known.
Chapter 25: LPC122x Appendix ARM Cortex-M0
UM10441
© NXP B.V. 2011. All rights reserved.
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