OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 201

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OM13013,598

Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of OM13013,598

Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
NXP Semiconductors
UM10441
User manual
Fig 22. Format and states in the Master Transmitter mode
successful
transmission
to a Slave
Receiver
next transfer
started with a
Repeated Start
condition
Not
Acknowledge
received after
the Slave
address
Not
Acknowledge
received after a
Data byte
arbitration lost
in Slave
address or
Data byte
arbitration lost
and
addressed as
Slave
DATA
n
08H
from Master to Slave
from Slave to Master
S
any number of data bytes and their associated Acknowledge bits
this number (contained in I2STA) corresponds to a defined state of the
I
2
C bus
SLA
All information provided in this document is subject to legal disclaimers.
W
MT
Rev. 1 — 15 February 2011
A OR A
18H
20H
68H 78H B0H
A
A
A
38H
P
other Master
continues
other Master
continues
DATA
states in Slave mode
to corresponding
Chapter 11: LPC122x I2C-bus controller
A OR A
28H
30H
A
A
38H
10H
P
S
P
other Master
continues
SLA
to Master
receive
UM10441
mode,
= MR
entry
© NXP B.V. 2011. All rights reserved.
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