OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 389
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
25.4.4.5.1 Syntax
25.4.4.5.2 Operation
25.4.4.5.3 Restrictions
25.4.4.5.4 Condition flags
LDM Rn{!}, reglist
STM Rn!, reglist
where:
LDMIA and LDMFD are synonyms for LDM. LDMIA refers to the base register being
Incremented After each access. LDMFD refers to its use for popping data from Full
Descending stacks.
STMIA and STMEA are synonyms for STM. STMIA refers to the base register being
Incremented After each access. STMEA refers to its use for pushing data onto Empty
Ascending stacks.
LDM instructions load the registers in reglist with word values from memory addresses
based on Rn.
STM instructions store the word values in the registers in reglist to memory addresses
based on Rn.
The memory addresses used for the accesses are at 4-byte intervals ranging from the
value in the register specified by Rn to the value in the register specified by Rn + 4 * (n-1),
where n is the number of registers in reglist. The accesses happens in order of increasing
register numbers, with the lowest numbered register using the lowest memory address
and the highest number register using the highest memory address. If the writeback suffix
is specified, the value in the register specified by Rn + 4 *n is written back to the register
specified by Rn.
In these instructions:
These instructions do not change the flags.
•
•
•
•
Rn is the register on which the memory addresses are based.
! writeback suffix.
reglist is a list of one or more registers to be loaded or stored, enclosed in braces. It can
contain register ranges. It must be comma separated if it contains more than one
register or register range, see
reglist and Rn are limited to R0-R7.
the writeback suffix must always be used unless the instruction is an LDM where
reglist also contains Rn, in which case the writeback suffix must not be used.
the value in the register specified by Rn must be word aligned. See
Section 25–25.4.3.4
for STM, if Rn appears in reglist, then it must be the first register in the list.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
for more information.
Section
Chapter 25: LPC122x Appendix ARM Cortex-M0
25–25.4.4.5.5.
UM10441
© NXP B.V. 2011. All rights reserved.
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