mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 127

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Addres
0x003A
0x003B
0x003C
0x003D
0x003E
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039
0x003F
0x02F0
0x02F1
0x02F2
4.3
This section provides a detailed description of all registers accessible in the S12CPMU_UHV.
4.3.1
The S12CPMU_UHV registers are shown in
Freescale Semiconductor
s
CPMUTEST0
CPMUTEST1
CPMUCLKS
RESERVED
RESERVED
CPMUCOP
CPMUFLG
CPMUPLL
CPMUINT
CPMURTI
POSTDIV
ARMCOP
REFDIV
APICTL
HTCTL
CPMU
CPMU
CPMU
CPMU
CPMU
CPMU
LVCTL
CPMU
Name
SYNR
Memory Map and Registers
Module Memory Map
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
PLLSEL
APICLK
RTDEC
WCOP
RTIE
Bit 7
RTIF
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
0
0
0
MC9S12VR Family Reference Manual, Rev. 2.2
Figure 4-3. CPMU Register Summary
Preliminary - Subject to Change Without Notice
= Unimplemented or Reserved
RSBCK
PORF
PSTP
RTR6
Bit 6
6
0
0
0
0
0
0
0
0
0
WRTMASK
Figure
CSAD
RTR5
VSEL
LVRF
FM1
Bit 5
5
0
0
0
0
0
0
0
0
0
4-3.
OSCSEL1
LOCKIE
LOCKIF
APIES
RTR4
COP
FM0
Bit 4
4
0
0
0
0
0
0
0
Clock, Reset and Power Management (S12CPMU_UHV)
APIEA
LOCK
RTR3
PRE
Bit 3
HTE
3
0
0
0
0
0
0
0
SYNDIV[5:0]
POSTDIV[4:0]
APIFE
HTDS
RTR2
LVDS
ILAF
PCE
CR2
Bit 2
2
0
0
0
0
0
REFDIV[3:0]
OSCSEL
OSCIF
OSCIE
RTR1
HTIE
APIE
LVIE
CR1
Bit 1
RTI
1
0
0
0
0
OSCSEL0
UPOSC
RTR0
HTIF
APIF
Bit 0
COP
CR0
Bit 0
LVIF
0
0
0
0
0
127

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