mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 76

no-image

mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Port Integration Module (S12VRPIMV2)
76
1
2.3.25
Address 0x0259
Read: Anytime
Write:Never
Field
Field
PTIP
PTP
PTP
Reset
5-0
1
0
W
R
PorT data register port P — General-purpose input/output data, PWM output, pin interrupt input/output, XIRQ input
The XIRQ signal is mapped to this pin when used with the XIRQ interrupt function. The
interrupt is enabled by clearing the X mask bit in the CPU Condition Code register. The I/O state of the
pin is forced to input level upon the first clearing of the X bit and held in this state even if the bit is set
again. A stop or wait recovery with the X bit set (refer to CPU12/CPU12X Reference Manual) is not
available.
When not used with the alternative function, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the
synchronized pin input state is read.
PorT data register port P — General-purpose input/output data, PWM output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the
synchronized pin input state is read.
PorT Input data register port P —
A read always returns the synchronized input state of the associated pin. It can be used to detect overload or short
circuit conditions on output pins.
• The XIRQ function takes precedence over the PWM and the general-purpose I/O function if enabled.
• The PWM function takes precedence over the general-purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
• The PWM function takes precedence over the general-purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
Port P Input Register (PTIP)
0
0
7
Table 2-25. PTP Register Field Descriptions (continued)
0
0
6
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Table 2-26. PTIP Register Field Descriptions
Figure 2-24. Port P Input Register (PTIP)
PTIP5
0
5
PTIP4
0
4
Description
Description
PTIP3
0
3
Rev. 2.2
PTIP2
2
0
Freescale Semiconductor
PTIP1
Access: User read only
0
1
PTIP0
0
0
1

Related parts for mc9s12vr48