mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 412

no-image

mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Low-Side Drivers - LSDRV (S12LSDRV1)
14.1.2
The LSDRV module behaves as follows in the system operating modes:
14.1.3
Figure 14-1
stage. Internal functions can be routed to control the low-side drivers. See PIM chapter for routing options.
412
1. Run mode
2. Stop mode
Active clamp to protect the device against over-voltage when the power transistor that is driving an
inductive load (relay) is turned off.
The activation of the LSE0 or LSE1 bits enable the related low-side driver. The gate is controlled
by the selected source in the Port Integration Module (see PIM chapter).
During stop mode operation the low-side drivers are shut down, i.e. the low-side drivers are
disabled and their gates are turned off. The bits in the data register which control the gates (LSDRx)
are cleared automatically. After returning from stop mode the drivers are re-enabled. If the data
register bits (LSDRx) were chosen as source in PIM module, then the respective low-side driver
gates stays turned off until the software sets the associated bit in the data register (LSDRx). When
the timer or PWM were chosen as source, the respective low-side driver gate is controlled by the
timer or PWM without further handling. When it is required that the gate stays turned off after the
stop mode for this case (PWM or timer), the software must take the appropriate action to turn off
the gate before entering stop mode.
Modes of Operation
Block Diagram
shows a block diagram of the LSDRV module. The module consists of a control and an output
LS0 control
LS1 control
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Figure 14-1. LSDRV Block Diagram
Rev. 2.2
LSGND
LS0
LS1
Freescale Semiconductor

Related parts for mc9s12vr48