mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 234

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

S12S Debug Module (S12SDBGV2)
the tagged instruction is about to be executed and the next transition is to Final State then a breakpoint is
generated immediately, before the tagged instruction is carried out.
R/W monitoring, access size (SZ) monitoring and data bus monitoring are not useful if tagging is selected,
since the tag is attached to the opcode at the matched address and is not dependent on the data bus nor on
the type of access. Thus these bits are ignored if tagging is selected.
When configured for range comparisons and tagging, the ranges are accurate only to word boundaries.
Tagging is disabled when the BDM becomes active.
6.4.7
It is possible to generate breakpoints from channel transitions to final state or using software to write to
the TRIG bit in the DBGC1 register.
6.4.7.1
Breakpoints can be generated when the state sequencer transitions to the Final State. If configured for
tagging, then the breakpoint is generated when the tagged opcode reaches the execution stage of the
instruction queue.
If a tracing session is selected by the TSOURCE bit, breakpoints are requested when the tracing session
has completed, thus if Begin aligned triggering is selected, the breakpoint is requested only on completion
of the subsequent trace (see
immediately.
If the BRK bit is set, then the associated breakpoint is generated immediately independent of tracing
trigger alignment.
6.4.7.2
If a TRIG triggers occur, the Final State is entered whereby tracing trigger alignment is defined by the
TALIGN bit. If a tracing session is selected by the TSOURCE bit, breakpoints are requested when the
tracing session has completed, thus if Begin aligned triggering is selected, the breakpoint is requested only
on completion of the subsequent trace (see
234
BRK
0
0
0
0
1
1
Breakpoints
Breakpoints From Comparator Channels
Breakpoints Generated Via The TRIG Bit
TALIGN
0
0
1
1
x
x
Table 6-42. Breakpoint Setup For CPU Breakpoints
Table
DBGBRK
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
6-42). If no tracing session is selected, breakpoints are requested
0
1
0
1
1
0
Table
Terminate tracing and generate breakpoint immediately on trigger
Fill Trace Buffer until trigger, then breakpoint request occurs
6-42). If no tracing session is selected, breakpoints are
Fill Trace Buffer until trigger then disarm (no breakpoints)
A breakpoint request occurs when Trace Buffer is full
Start Trace Buffer at trigger (no breakpoints)
Terminate tracing immediately on trigger
Start Trace Buffer at trigger
Breakpoint Alignment
Rev. 2.2
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