mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 61

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
2
3
4
5
2.3.10
Freescale Semiconductor
Function
Address 0x0240
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
PWM function available on this pin only if not used with a routed HSDRV or LSDRV function. Refer to
Routing Register 0
TIM output compare function available on this pin only if not used with routed HSDRV. Refer to
Register 0
“Module Routing Register 2
TIM output compare function available on this pin only if not used with routed HSDRV. Refer to
Register 0
TIM output compare function available on this pin only if not used with routed LSDRV. Refer to
Register 0
Altern.
Field
Reset
PTT
3-2
W
R
PorT data register port T — General-purpose input/output data, SPI SS and SCK, TIM input/output, routed LINPHY
When not used with the alternative function, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the
synchronized pin input state is read.
(MODRR0)”. TIM input capture function available on this pin only if not used with LPRXD. Refer to
(MODRR0)”
(MODRR0)”
• The routed SPI takes precedence over the routed LINPHY function, TIM output function and the general-purpose
• The routed LINPHY function takes precedence over the TIM output function and the general-purpose I/O function
• The TIM function takes precedence over the general-purpose I/O function.
Port T Data Register (PTT)
I/O function if enabled.
if the related channel is enabled.
0
0
7
(MODRR0)”
(MODRR2)”.
0
0
6
Table 2-10. PTT Register Field Descriptions
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Figure 2-8. Port T Data Register (PTT)
5
0
0
0
0
4
Description
(LPTXD)
IOC3
PTT3
(SS)
0
3
3
(LPRXD)
IOC2
(SCK)
PTT2
Port Integration Module (S12VRPIMV2)
0
2
4
Section 2.3.15, “Module Routing
Section 2.3.15, “Module Routing
Section 2.3.15, “Module Routing
(LPDR1)
PWM7
(TXD0)
Access: User read/write
IOC1
PTT1
Section 2.3.15, “Module
0
1
5
2
Section 2.3.23,
PWM6
(RXD0)
IOC0
PTT0
0
0
5
2
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