mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 26

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Device Overview MC9S12VR-Family
1.4.17
1.4.18
1.4.19
1.4.20
26
Background debug module (BDM) with single-wire interface
Trace buffer with depth of 64 entries
Three comparators (A, B and C)
Two types of comparator matches
Four trace modes
Four stage state sequencer
2x low-side drivers targeted for up to approximately 150mA current capability.
Internal timer or PWM channels can be routed to control the low-side drivers
Open-load detection
Over-current protection with shutdown and interrupt
Active clamp (for driving relays)
Recirculation detection
2 High-side drivers targeted for up to approximately 44mA current capability
Internal timer or PWM channels can be routed to control the high-side drivers
Open load detection
Over-current protection with shutdown and interrupt
— Non-intrusive memory access commands
— Supports in-circuit programming of on-chip nonvolatile memory
— Access address comparisons with optional data comparisons
— Program counter comparisons
— Exact address or address range comparisons
— Tagged This matches just before a specific instruction begins execution
— Force This is valid on the first instruction boundary after a match occurs
Low-side drivers (LSDRV)
High-side drivers (HSDRV)
Background Debug (BDM)
Debugger (DBG)
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Rev. 2.2
Freescale Semiconductor

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