mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 466

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
64 KByte Flash Module (S12FTMRG64K512V1)
17.3.2.1
The FCLKDIV register is used to control timed events in program and erase algorithms.
All bits in the FCLKDIV register are readable, bit 7 is not writable, bit 6 is write-once-hi and controls the
writability of the FDIV field in normal mode. In special mode, bits 6-0 are writable any number of times
but bit 7 remains unwritable.
466
FDIVLD
Address
Offset Module Base + 0x0000
Reset
& Name
0x0011
0x0012
0x0013
FRSV5
FRSV6
FRSV7
Field
7
W
R
FDIVLD
Clock Divider Loaded
0 FCLKDIV register has not been written since the last reset
1 FCLKDIV register has been written since the last reset
Flash Clock Divider Register (FCLKDIV)
0
7
W
W
W
R
R
R
The FCLKDIV register should never be written while a Flash command is
executing (CCIF=0).
= Unimplemented or Reserved
7
0
0
0
FDIVLCK
Figure 17-3. FTMRG64K512 Register Summary (continued)
0
6
Figure 17-4. Flash Clock Divider Register (FCLKDIV)
= Unimplemented or Reserved
6
0
0
0
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Table 17-6. FCLKDIV Field Descriptions
0
5
5
0
0
0
CAUTION
0
4
Description
4
0
0
0
0
3
FDIV[5:0]
3
0
0
0
Rev. 2.2
0
2
2
0
0
0
Freescale Semiconductor
0
1
1
0
0
0
0
0
0
0
0
0

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