mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 89

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

1
1
2.3.44
2.3.45
Freescale Semiconductor
Address 0x027D
Address 0x027F
PIE1AD
PIF1AD
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime, write 1 to clear
Read: Anytime.
Field
Field
Reset
Reset
5-0
5-0
W
W
R
R
Pin Interrupt Enable register 1 port AD —
This bit enables or disables the edge sensitive pin interrupt on the associated pin. An interrupt can be generated if
the pin is operating in input or output mode when in use with the general-purpose or related peripheral function.
For wakeup from stop mode this bit must be set to allow activating the RC oscillator.
1 Interrupt is enabled
0 Interrupt is disabled (interrupt flag masked)
Pin Interrupt Flag register 1 port AD —
This flag asserts after a valid active edge was detected on the related pin
a rising or a falling edge based on the state of the polarity select register. An interrupt will occur if the associated
interrupt enable bit is set.
1 Active edge on the associated bit has occurred
0 No active edge occurred
Port AD Interrupt Enable Register (PIE1AD)
Port AD Interrupt Flag Register (PIF1AD)
0
0
0
0
7
7
Figure 2-43. Port AD Interrupt Enable Register (PIE1AD)
0
0
0
0
6
6
Figure 2-44. Port AD Interrupt Flag Register (PIF1AD)
Table 2-46. PIE1AD Register Field Descriptions
Table 2-47. PIF1AD Register Field Descriptions
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
PIE1AD5
PIF1AD5
5
0
5
0
PIE1AD4
PIF1AD4
0
0
4
4
Description
Description
PIE1AD3
PIF1AD3
0
0
3
3
PIE1AD2
PIF1AD2
(Section 2.4.4,
Port Integration Module (S12VRPIMV2)
0
0
2
2
PIE1AD1
PIF1AD1
“Interrupts”). This can be
Access: User read/write
Access: User read/write
0
0
1
1
PIE1AD0
PIF1AD0
0
0
0
0
89
1
1