mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 47

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 2
Port Integration Module (S12VRPIMV2)
2.1
2.1.1
The S12VR port integration module (PIM) establishes the interface between the peripheral modules and
the I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This section covers:
Freescale Semiconductor
(Item No.)
Rev. No.
V02.00
V02.01
V02.02
V02.03
2-pin port E associated with the external oscillator
4-pin port T associated with 4 TIM channels and 2 PWM channels
6-pin port S associated with 2 SCI and 1 SPI
6-pin port P with pin interrupts and wakeup function; associated with
— IRQ, XIRQ interrupt inputs
Introduction
(Submitted By)
Overview
05 Apr 2011
07 Apr 2011
11 Apr 2011
18 Apr 2011
Date
Sections
Affected
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Table 2-1. Revision History
• Changed DDRL to DIENL (digital input buffer enable) with inverse
• Renamed routing registers to MODRR
• Added 6 PWM channels (ports P and T) Changed PWM routing options to
• Added PTADIRL and PTABYP bits to support ADC direct input Changed
• Corrected reduced drive ratio on PP2
• Added HVI open input detection (moved PIMTEST[PLTEN] to
• Added application section for HVI open input detection
• Revised port L HVI diagram for HVI open input detection
• Minor corrections after review
• Added stop mode condition to PTTEL and PTPSL
• Minor corrections after review
• Minor corrections after review
functionality
HS[1:0] and LS[1:0]
PWM and ETRIG routing assignments on port S
PTAL[PTTEL] and PIMTEST[PLTPU] to PTAL[PTPSL])
Substantial Change(s)
47

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