mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 147

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.3.2.14
The CPMULVCTL register allows the configuration of the low-voltage detect features.
Read: Anytime
Write: LVIE and LVIF are write anytime, LVDS is read only
Freescale Semiconductor
0x02F1
The Reset state of LVDS and LVIF depends on the external supplied VDDA level
Reset
LVDS
Field
LVIE
LVIF
2
1
0
W
R
Low-Voltage Detect Status Bit — This read-only status bit reflects the voltage level on VDDA.Writes have no
effect.
0 Input voltage VDDA is above level V
1 Input voltage VDDA is below level V
Low-Voltage Interrupt Enable Bit
0 Interrupt request is disabled.
1 Interrupt will be requested whenever LVIF is set.
Low-Voltage Interrupt Flag — LVIF is set to 1 when LVDS status bit changes. This flag can only be cleared by
writing a 1.Writing a 0 has no effect. If enabled (LVIE = 1), LVIF causes an interrupt request.
0 No change in LVDS bit.
1 LVDS bit has changed.
Low Voltage Control Register (CPMULVCTL)
0
0
7
= Unimplemented or Reserved
Figure 4-18. Low Voltage Control Register (CPMULVCTL)
0
0
6
Table 4-16. CPMULVCTL Field Descriptions
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
0
0
5
LVIA
LVID
and FPM.
or RPM.
0
0
4
Description
Clock, Reset and Power Management (S12CPMU_UHV)
0
0
3
LVDS
U
2
LVIE
0
1
LVIF
U
0
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