mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 28

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Device Overview MC9S12VR-Family
1.6
Table 1-3
28
Family Memory Map
shows the MC9S12VR-Family register memory map.
0x00C8–0x00CF
0x00D8–0x00DF
0x000A–0x000B
0x000C–0x000D
0x001A–0x001B
0x001C–0x001F
0x00A0–0x00C7
0x00D0–0x00D7
0x00E0–0x00FF
0x000E–0x000F
0x0000–0x0009
0x0010–0x0017
0x0018–0x0019
0x0020–0x002F
0x0030–0x0033
0x0034–0x003F
0x0040–0x006F
0x0070–0x009F
0x0100–0x0113
0x0114–0x011F
0x0121–0x013F
0x0178–0x023F
0x0240–0x027F
0x0140-0x0147
0x0148-0x014F
0x0150-0x0157
0x0158-0x015F
0x0160-0x0167
0x0168-0x016F
0x0170-0x0177
Address
0x0120
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Table 1-3. Device Register Memory Map
PIM (port integration module
MMC (memory map control)
PIM (port integration module)
Reserved
MMC (memory map control)
Reserved
Device ID register
PIM (port integration module)
DBG (debug module)
Reserved
CPMU (clock and power management)
TIM (timer module <= 4channels)
ADC (analog to digital converter <= 6 channels)
PWM (pulse-width modulator <= 2channels)
SCI0 (serial communication interface)
SCI1 (serial communication interface)
SPI (serial peripheral interface)
Reserved
FTMRG control registers
Reserved
INT (interrupt module)
Reserved
HSDRV (high-side driver)
Reserved
LSDRV (low-side driver)
Reserved
LINPHY (LIN physical layer)
Reserved
BATS (Supply Voltage Sense)
Reserved
PIM (port integration module)
Module
)
Rev. 2.2
(Bytes)
Size
200
Freescale Semiconductor
10
16
12
48
48
40
32
20
12
31
64
2
2
2
8
2
2
4
4
8
8
8
1
8
8
8
8
8
8
8