mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 46

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Device Overview MC9S12VR-Family
1.14
The ADC module includes external trigger inputs ETRIG0, ETRIG1, ETRIG2, and ETRIG3. The external
trigger allows the user to synchronize ADC conversion to external trigger events. ETRIG0 is connected to
PP0 / PWM0 and ETRIG1 is connected to PP1 / PWM1. ETRIG2 and ETRIG3 are not used .ETRIG0 can
be routed to PS2 and ETRIG1 can be routed to PS3.
1.15
Whenever the ADC’s Special Channel Conversion Bit (SC) in 8.3.2.6 ATD Control Register 5 (ATDCTL5)
is set, it is capable of running conversion on a number of internal channels.
sources which are connected to these special conversion channels.
46
ADC External Trigger Input Connection
ADC Special Conversion Channels
SC
1
1
1
1
1
CD
0
0
0
1
1
ATDCTL5 Register Bits
CC
0
0
0
0
0
Table 1-13. Usage of ADC Special Conversion Channels
CB
FOPT Register
0
1
1
1
1
MC9S12VR Family Reference Manual,
NV[3] in
Preliminary - Subject to Change Without Notice
Table 1-12. Initial WCOP Configuration
1
0
CA
1
0
1
0
1
ADC Channel
Internal_7
Internal_0
Internal_1
Internal_4
Internal_5
COPCTL Register
V
High voltage inputs Port L see
sensor V
Bandgap Voltage V
SENSE
WCOP in
Control Register (CPMUHTCTL)
Analog Access Register (PTAL)
LINPHY temperature sensor
0
1
Flash Supply Voltage VDDF
or V
Rev. 2.2
HT
see
see 4.3.2.13 High Temperature
SUP
16.1.1 Features
selectable in BATS module
Usage
Table 1-13
BG
or Chip temperature
Freescale Semiconductor
2.3.34 Port L
lists the internal

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