mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 263

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
8.3.2.5
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0004
SMP[2:0]
PRS[4:0]
Reset
Field
7–5
4–0
W
R
SMP2
Sample Time Select — These three bits select the length of the sample time in units of ATD conversion clock
cycles. Note that the ATD conversion clock period is itself a function of the prescaler value (bits PRS4-0).
Table 8-13
ATD Clock Prescaler — These 5 bits are the binary prescaler value PRS. The ATD conversion clock frequency
is calculated as follows:
Refer to Device Specification for allowed frequency range of f
ATD Control Register 4 (ATDCTL4)
0
7
FRZ1
lists the available sample time lengths.
0
0
1
1
SMP1
f ATDCLK
SMP2
Table 8-11. ATD Behavior in Freeze Mode (Breakpoint)
0
6
0
0
0
0
1
1
1
Figure 8-7. ATD Control Register 4 (ATDCTL4)
FRZ0
0
1
0
1
MC9S12VR Family Reference Manual, Rev. 2.2
Table 8-12. ATDCTL4 Field Descriptions
Preliminary - Subject to Change Without Notice
=
------------------------------------ -
2
SMP1
SMP0
×
Table 8-13. Sample Time Select
Continue conversion
Reserved
Finish current conversion, then freeze
Freeze Immediately
(
0
0
1
1
0
0
1
0
5
f BUS
PRS
+
1
)
SMP0
0
1
0
1
0
1
0
0
4
Behavior in Freeze Mode
Description
ATD Clock Cycles
0
3
Sample Time
in Number of
ATDCLK
10
12
16
20
4
6
8
.
Analog-to-Digital Converter (ADC12B6CV2)
PRS[4:0]
1
2
0
1
1
0
263

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