mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 391

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

When the TFFCA bit in the TSCR register is set, any access to the PACNT register will clear all the flags
in the PAFLG register. Timer module or Pulse Accumulator must stay enabled (TEN=1 or PAEN=1) while
clearing these bits.
12.3.2.17 Pulse Accumulators Count Registers (PACNT)
1
Read: Anytime
Write: Anytime
These registers contain the number of active input edges on its input pin since the last reset.
When PACNT overflows from 0xFFFF to 0x0000, the Interrupt flag PAOVF in PAFLG (0x0021) is set.
Full count register access should take place in one clock cycle. A separate read/write for high byte and low
byte will give a different result than accessing them as a word.
Freescale Semiconductor
Module Base + 0x0022
Module Base + 0x0023
This register is available only when channel 7 exists and is reserved if that channel does not exist. Writes to a reserved register
have no functional effect. Reads from a reserved register return zeroes.
PAOVF
Reset
Reset
Field
PAIF
1
0
W
W
R
R
PACNT15
PACNT7
Pulse Accumulator Overflow Flag — Set when the 16-bit pulse accumulator overflows from 0xFFFF to 0x0000.
Clearing this bit requires writing a one to this bit in the PAFLG register while TEN bit of TSCR1 or PAEN bit of
PACTL register is set to one.
Pulse Accumulator Input edge Flag — Set when the selected edge is detected at the IOC7 input pin.In event
mode the event edge triggers PAIF and in gated time accumulation mode the trailing edge of the gate signal at
the IOC7 input pin triggers PAIF.
Clearing this bit requires writing a one to this bit in the PAFLG register while TEN bit of TSCR1 or PAEN bit of
PACTL register is set to one. Any access to the PACNT register will clear all the flags in this register when TFFCA
bit in register TSCR(0x0006) is set.
15
0
0
7
Figure 12-26. Pulse Accumulator Count Register High (PACNTH)
Figure 12-27. Pulse Accumulator Count Register Low (PACNTL)
PACNT14
PACNT6
14
0
0
6
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Table 12-21. PAFLG Field Descriptions
PACNT13
PACNT5
13
0
0
5
PACNT12
PACNT4
12
0
0
4
Description
PACNT11
PACNT3
11
0
0
3
PACNT10
PACNT2
10
0
0
2
Timer Module (TIM16B8CV3)
PACNT9
PACNT1
0
0
9
1
PACNT8
PACNT0
0
0
0
0
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