mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 56

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Port Integration Module (S12VRPIMV2)
1. Not applicable for Port L. Refer to register descriptions.
56
2. Select either a pullup or pulldown device if PER is active.
1
2
Always “0” on Port E
Applicable only on Port P and AD
DDR
0
0
0
0
0
0
0
1
1
1
1
PORT
All register bits in this module are completely synchronous to internal
clocks during a register read.
Figure of port data registers also display the alternative functions if
applicable on the related pin as defined in
parentheses denote the availability of the function when using a specific
routing option.
Figures of module routing registers also display the module instance or
module channel associated with the related routing bit.
PT
0
1
0
1
x
x
x
x
x
x
x
PER
0
1
1
0
0
1
1
x
x
x
x
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Table 2-3. Pin Configuration Summary
PPS
0
1
0
1
0
1
0
1
x
x
x
1
PIE
0
0
0
1
1
1
1
0
0
1
1
2
NOTE
Input
Input
Input
Input
Input
Input
Input
Output, drive to 0
Output, drive to 1
Output, drive to 0
Output, drive to 1
Function
Table
Rev. 2.2
2-2. Names in
1
Disabled
Pullup
Pulldown
Disabled
Disabled
Pullup
Pulldown
Disabled
Disabled
Disabled
Disabled
Pull Device
Freescale Semiconductor
Disabled
Disabled
Disabled
Falling edge
Rising edge
Falling edge
Rising edge
Disabled
Disabled
Falling edge
Rising edge
Interrupt

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