mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 84

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
1
Address 0x026C
Address 0x026D
Port Integration Module (S12VRPIMV2)
2.3.35
2.3.36
84
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
Reset
Reset
PPSL
Field
Field
PIRL
W
W
3-0
3-0
R
R
Port L Input Divider Ratio Selection Register (PIRL)
Port L Polarity Select Register (PPSL)
0
0
0
0
7
7
Port L Input Divider Ratio Select —
This bit selects one of two voltage divider ratios for the associated high-voltage input pin in analog mode.
1 Ratio
0 Ratio
Pin interrupt Polarity Select register port L —
This bit selects the polarity of the active pin interrupt edge.
1 Rising edge selected
0 Falling edge selected
Figure 2-34. Port L Input Divider Ratio Selection Register (PIRL)
L_HVI
H_HVI
0
0
0
0
6
selected
6
selected
Figure 2-35. Port L Polarity Select Register (PPSL)
Table 2-38. PPSL Register Field Descriptions
Table 2-37. PIRL Register Field Descriptions
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
5
0
0
5
0
0
0
0
0
0
4
4
Description
Description
PPSL3
PIRL3
0
0
3
3
Rev. 2.2
PPSL2
PIRL2
0
0
2
2
Freescale Semiconductor
PPSL1
Access: User read/write
Access: User read/write
PIRL1
0
0
1
1
PPSL0
PIRL0
0
0
0
0
1
1

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