mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 415

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

1
2
14.3.2
14.3.3
Freescale Semiconductor
Module Base + 0x0000
Function
Read: Anytime. The data source (LSDRx or alternate function) depends on the LSE control bit settings.
Write: Anytime
See PIM chapter for detailed routing description.
LSDR
Altern.
Field
Reset
Read
1-0
W
R
Port LS Data Bits—Data registers or routed timer outputs or routed PWM outputs
These register bits can be used to control the low-side drivers gates if selected as control source. See PIM section
for routing details.
If the associated LSE bit is set to 0, a read returns the value of the Port LS Data Register (LSDRx).
If the associated LSE bit is set to 1, a read returns the value of the selected control source in PIM module.
When entering in STOP mode the Port LS Data Register (LSDR) is cleared.
0 Low-side driver gate is turned off
1 Low-side driver gate is turned on
Register Definition
Port LS Data Register (LSDR)
0
0
0
7
= Unimplemented
After enabling the low-side driver with the LSEx bit in LSCR
register, the user must wait a minimum settling time t
before turning on the low-side driver gate.
The low-side driver gate should be turned off (e.g. LDSRx=0 or
OC=0 or PWM=0) and the load should be de-energized before
going into Stop Mode or disabling the low-side driver with the
LSEx bits.
0
0
0
6
Table 14-4. LSDR Register Field Descriptions
Figure 14-2. Port LS Data Register (LSDR)
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
5
0
0
0
0
0
0
4
Description
NOTE
NOTE
0
0
0
3
Low-Side Drivers - LSDRV (S12LSDRV1)
0
0
0
2
LS_settling
LSDR1
Access: User read/write
PWM
OC
0
1
2
2
LSDR0
PWM
OC
0
0
2
2
415
1