mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 400

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

High-Side Drivers - HSDRV (S12HSDRV1)
13.1.2
The HSDRV module behaves as follows in the system power modes:
13.1.3
Figure 13-1
stage. Internal functions can be routed to control the high-side drivers. See PIM chapter for routing options.
400
1. CPU run mode
2. CPU stop mode
The activation of the HSE0 or HSE1 bits enable the related high-side driver. The gate is controlled
by the selected source.
During stop mode operation the high-side drivers are shut down, i.e. the high-side drivers are
disabled and their gates are turned off The bits in the data register which control the gates (HSDRx)
are cleared automatically. After returning from stop mode the drivers are re-enabled and the state
of the HSE bits are automatically set If the data register bits (HSDRx) were chosen as source in
PIM module, then the respective high-side driver gates stays turned off until the software sets the
associated bit in the data register (HSDRx). When the timer or PWM were chosen as source, the
respective high-side driver gate is controlled by the timer or PWM without further handling When
it is required that the gate stays turned off after the stop mode for this case (PWM or timer), the
software must take the appropriate action to turn off the gate before entering stop mode.
HS0 Open Load
HS0 Over Current
HS1 Over Current
HS1 control
HS1 Open Load
HS0 control
Modes of Operation
Block Diagram
shows a block diagram of the HSDRV module. The module consists of a control and an output
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Figure 13-1. HSDRV Block Diagram
Rev. 2.2
VSUPHS
HS0
HS1
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