mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 235

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

requested immediately. TRIG breakpoints are possible with a single write to DBGC1, setting ARM and
TRIG simultaneously.
6.4.7.3
If a TRIG trigger occurs after Begin aligned tracing has already started, then the TRIG no longer has an
effect. When the associated tracing session is complete, the breakpoint occurs. Similarly if a TRIG is
followed by a subsequent comparator channel match, it has no effect, since tracing has already started.
If a forced SWI breakpoint coincides with a BGND in user code with BDM enabled, then the BDM is
activated by the BGND and the breakpoint to SWI is suppressed.
6.4.7.3.1
Breakpoint operation is dependent on the state of the BDM module. If the BDM module is active, the CPU
is executing out of BDM firmware, thus comparator matches and associated breakpoints are disabled. In
addition, while executing a BDM TRACE command, tagging into BDM is disabled. If BDM is not active,
the breakpoint gives priority to BDM requests over SWI requests if the breakpoint happens to coincide
with a SWI instruction in user code. On returning from BDM, the SWI from user code gets executed.
BDM cannot be entered from a breakpoint unless the ENABLE bit is set in the BDM. If entry to BDM via
a BGND instruction is attempted and the ENABLE bit in the BDM is cleared, the CPU actually executes
the BDM firmware code, checks the ENABLE and returns if ENABLE is not set. If not serviced by the
monitor then the breakpoint is re-asserted when the BDM returns to normal CPU flow.
If the comparator register contents coincide with the SWI/BDM vector address then an SWI in user code
could coincide with a DBG breakpoint. The CPU ensures that BDM requests have a higher priority than
SWI requests. Returning from the BDM/SWI service routine care must be taken to avoid a repeated
breakpoint at the same address.
Should a tagged or forced breakpoint coincide with a BGND in user code, then the instruction that follows
the BGND instruction is the first instruction executed when normal program execution resumes.
Freescale Semiconductor
DBGBRK
Breakpoint Priorities
X
0
1
1
1
DBG Breakpoint Priorities And BDM Interfacing
(DBGC1[4])
BDM Bit
Table 6-43. Breakpoint Mapping Summary
X
0
X
1
1
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Enabled
BDM
X
X
1
0
1
Active
BDM
X
X
0
1
0
Breakpoint to BDM
Breakpoint to SWI
Breakpoint to SWI
S12S Debug Module (S12SDBGV2)
No Breakpoint
No Breakpoint
Breakpoint
Mapping
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