mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 50

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Port Integration Module (S12VRPIMV2)
50
Port
S
Pin Name
PS5
PS4
PS3
PS2
PS1
PS0
Pin Function
& Priority
(ETRIG1)
(ETRIG0)
(LPDR1)
(PWM5)
(PWM4)
(RXD1)
(RXD0)
(TXD1)
(TXD0)
PTS[5]
PTS[4]
PTS[3]
PTS[2]
PTS[1]
PTS[0]
ECLK
RXD1
MOSI
MISO
TXD1
SCK
SS
1
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
I/O
I/O SPI slave select
I/O General-purpose
I/O SPI serial clock
I/O General-purpose
I/O SPI master out / slave in
I/O Serial Communication Interface 1 transmit pin
I/O General-purpose
I/O SPI master in / slave out
I/O General-purpose
I/O Serial Communication Interface 1 transmit pin
I/O Serial Communication Interface 0 transmit pin
I/O General-purpose
I/O General-purpose
O Free running clock
O Pulse Width Modulator channel 5
O Pulse Width Modulator channel 4
O LINPHY register LPDR[LPDR1]
I
I
I
I
I
ADC external trigger input
Serial Communication Interface 1 receive pin
ADC external trigger input
Serial Communication Interface 1 receive pin
Serial Communication Interface 0 receive pin
Description
Rev. 2.2
Freescale Semiconductor
Pin Function
after Reset
GPIO

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