mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 92

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Port Integration Module (S12VRPIMV2)
2.4.2.7
If the pin is used as an output this register turns off the active-high drive. This allows wired-or type
connections of outputs.
2.4.2.8
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
2.4.2.9
If the pin is used as an interrupt input this register holds the interrupt flag after a valid pin event.
2.4.2.10
Routing registers allow software re-configuration of specific peripheral inputs and outputs:
2.4.3
2.4.3.1
The BKGD pin is associated with the BDM module.
During reset, the BKGD pin is used as MODC input.
2.4.3.2
This port is associated with the CPMU OSC.
Port E pins PE1-0 can be used for general-purpose or with the CPMU OSC module.
2.4.3.3
This port is associated with TIM, routed SCI-LINPHY interface and routed SPI.
Port T pins can be used for either general-purpose I/O or with the channels of the standard TIM, SPI, or
SCI and LINPHY subsystems.
92
MODRR0 selects the driving source of the HSDRV and LSDRV pins
MODRR1 selects optional pins for PWM channels and ETRIG inputs
MODRR2 supports options to test the internal SCI-LINPHY interface signals
Pins and Ports
Wired-or mode register (WOMx)
Interrupt enable register (PIEx)
Interrupt flag register (PIFx)
Module routing register (MODRRx)
BKGD pin
Port E
Port T
Please refer to the device pinout section to determine the pin availability in
the different package options.
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
NOTE
Rev. 2.2
Freescale Semiconductor

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