mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 58

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
Port Integration Module (S12VRPIMV2)
2.3.5
2.3.6
58
Address 0x000C
Address 0x001C
BKPUE
PDPEE
Read:Anytime
Write:Anytime, except BKPUE, which is writable in special mode only
DDRE
Field
Field
Reset
Reset
1-0
6
4
W
W
R
R
Data Direction Register port E —
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
BKGD pin Pullup Enable — Activate pullup device on pin
This bit configures whether a pullup device is activated, if the pin is used as input. If a pin is used as output this bit
has no effect.
1 Pullup device enabled
0 Pullup device disabled
Pull-Down Port E Enable — Activate pulldown devices on all port input pins
This bit configures whether a pulldown device is activated on all associated port input pins. If a pin is used as output
or used with the CPMU OSC function this bit has no effect. Out of reset the pulldown devices are enabled.
1 Pulldown devices enabled
0 Pulldown devices disabled
NECLK
Port E, BKGD pin Pull Control Register (PUCR)
ECLK Control Register (ECLKCTL)
0
0
1
7
7
BKPUE
Figure 2-3. Port E, BKGD pin Pull Control Register (PUCR)
1
0
0
6
6
Figure 2-4. ECLK Control Register (ECLKCTL)
Table 2-5. DDRE Register Field Descriptions
Table 2-6. PUCR Register Field Descriptions
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
5
0
0
5
0
0
PDPEE
1
0
0
4
4
Description
Description
0
0
0
0
3
3
Rev. 2.2
0
0
0
0
2
2
Freescale Semiconductor
Access: User read/write
Access: User read/write
0
0
0
0
1
1
0
0
0
0
0
0
1
1

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