mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 72

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

1
Port Integration Module (S12VRPIMV2)
2.3.23
72
Address 0x024F
Routing
MODRR2
MODRR2
MODRR2
MODRR2
Read: Anytime
Write: Once in normal, anytime in special mode
Option
Reset
Field
3-0
7
5
4
W
R
MODRR27
LPRXD to
MODule Routing Register 2 — TIM routing
1 TIM input capture channel 3 is connected to LPRXD
0 TIM input capture channel 3 is connected to PT3
MODule Routing Register 2 — SPI SS and SCK routing
1 SS on PT3; SCK on PT2
0 SS on PS5; SCK on PS4
MODule Routing Register 2 — SCI1 routing
1 TXD1 on PS3; RXD1 on PS2
0 TXD1 on PS1; RXD1 on PS0
MODule Routing Register 2 — SCI0-to-LINPHY routing
Selection of SCI0-to-LINPHY interface routing options to support probing and conformance testing. Refer to
Figure 2-22
effect on pins. LINPHY must be enabled for LPRXD and LPDR[LPDR1] routings to take effect on pins.
Module Routing Register 2 (MODRR2)
TIM
0
7
for an illustration and
Table 2-23. Module Routing Register 2 Field Descriptions
—
0
0
6
Figure 2-21. Module Routing Register 2 (MODRR2)
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
SS and SCK
MODRR25
SPI
5
0
Table 2-24
MODRR24
for preferred settings. SCI0 must be enabled for TXD0 routing to take
SCI1
0
4
Description
MODRR23
0
3
Rev. 2.2
SCI0-to-LINPHY interface
MODRR22
0
2
MODRR21
Freescale Semiconductor
Access: User read/write
0
1
MODRR20
0
0
1