mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 82

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

1
Port Integration Module (S12VRPIMV2)
2.3.34
82
Address 0x026B
PTABYPL
PTADIRL
Read: Anytime
Write: Anytime
PTPSL
PTTEL
Field
Reset
7
6
5
4
W
R
PorT Test Enable port L —
This bit forces the input buffer of the selected HVI pin (PTAL[1:0]) to be active while using the analog function to
support open input detection in run mode. Refer to
this bit has no effect.
Note: In direct input connection (PTAL[PTADIRL]=1) the digital input buffer is not enabled.
1 Input buffer enabled when used with analog function and not in direct mode (PTAL[PTADIRL]=0)
0 Input buffer disabled when used with analog function
PorT Pull Select port L —
This bit selects a pull device on the selected HVI pin (PTAL[1:0]) in analog mode for open input detection. By default
a pulldown device is active as part of the input voltage divider. If set to 1 and PTTEL=1 and not in stop mode a pullup
to a level close to V
Detection on HVI
1 Pullup enabled
0 Pulldown enabled
PorT ADC connection BYPass port L —
This bit bypasses and powers down the impedance converter stage in the signal path from the analog input pin to
the ADC channel input. This bit takes effect only if using direct input connection to the ADC channel (PTADIRL=1).
1 Bypass impedance converter in ADC channel signal path
0 Use impedance converter in ADC channel signal path
PorT ADC DIRect connection port L —
This bit connects the selected analog input signal (PTAL[1:0]) directly to the ADC channel bypassing the voltage
divider. This bit takes effect only in analog mode (PTAENL=1).
1 Input pin directly connected to ADC channel
0 Input voltage divider active on analog input to ADC channel
PTTEL
Port L Analog Access Register (PTAL)
0
7
PTPSL
Pins”).
0
6
DDX
Figure 2-33. Port L Analog Access Register (PTAL)
Table 2-35. PTAL Register Field Descriptions
takes effect and overrides the weak pulldown device. Refer to
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
PTABYPL
5
0
PTADIRL
0
4
Section 2.5.4, “Open Input Detection on HVI
Description
PTAENL
0
3
Rev. 2.2
0
0
2
Section 2.5.4, “Open Input
Freescale Semiconductor
Access: User read/write
PTAL1
0
1
Pins”). In stop mode
PTAL0
0
0
1