mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 145

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

4.3.2.12
This register is used to restart the COP time-out period.
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”) writing to this register has no effect.
When the COP is enabled by setting CR[2:0] nonzero, the following applies:
4.3.2.13
The CPMUHTCTL register configures the temperature sense features.
Read: Anytime
Write: VSEL, HTE, HTIE and HTIF are write anytime, HTDS is read only
Freescale Semiconductor
0x02F0
0x003F
Reset
Reset
W ARMCOP-Bit
W
R
R
Writing any value other than $55 or $AA causes a COP reset. To restart the COP time-out period
write $55 followed by a write of $AA. These writes do not need to occur back-to-back, but the
sequence ($55, $AA) must be completed prior to COP end of time-out period to avoid a COP reset.
Sequences of $55 writes are allowed. When the WCOP bit is set, $55 and $AA writes must be done
in the last 25% of the selected time-out period; writing any value in the first 75% of the selected
period will cause a COP reset.
S12CPMU_UHV COP Timer Arm/Reset Register (CPMUARMCOP)
H
0
7
0
0
0
7
7
igh
T
= Unimplemented or Reserved
ARMCOP-Bit
Figure 4-16. High Temperature Control Register (CPMUHTCTL)
emperature
0
6
0
0
0
6
6
Figure 4-15. S12CPMU_UHV CPMUARMCOP Register
MC9S12VR Family Reference Manual, Rev. 2.2
ARMCOP-Bit
Preliminary - Subject to Change Without Notice
VSEL
0
5
0
0
5
5
Control Register (CPMUHTCTL)
ARMCOP-Bit
0
4
0
0
0
4
4
ARMCOP-Bit
HTE
Clock, Reset and Power Management (S12CPMU_UHV)
0
3
0
0
3
3
ARMCOP-Bit
HTDS
0
2
0
0
2
2
ARMCOP-Bit
HTIE
0
1
0
0
1
1
ARMCOP-Bit
HTIF
0
0
0
0
0
0
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