mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 208

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
S12S Debug Module (S12SDBGV2)
208
Bit[15:0]
Field
15–0
Trace Buffer Data Bits — The Trace Buffer Register is a window through which the 20-bit wide data lines of the
Trace Buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer
which points to the next address to be read. When the ARM bit is set the trace buffer is locked to prevent reading.
The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when the
module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned
access of these registers return 0 and do not cause the trace buffer pointer to increment to the next trace buffer
address. Similarly reads while the debugger is armed or with the TSOURCE bit clear, return 0 and do not affect
the trace buffer pointer. The POR state is undefined. Other resets do not affect the trace buffer contents.
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Table 6-11. DBGTB Field Descriptions
Description
Rev. 2.2
Freescale Semiconductor

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