mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 32

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Device Overview MC9S12VR-Family
1.7.2
This section describes the signal properties.
1.7.2.1
The RESET signal is an active low bidirectional control signal. It acts as an input to initialize the MCU to
a known start-up state, and an output when an internal MCU function causes a reset. The RESET pin has
an internal pull-up device.
1.7.2.2
This input only pin is reserved for factory test. This pin has an internal pull-down device.
1.7.2.3
The BKGD/MODC pin is used as a pseudo-open-drain pin for the background debug communication. It
is used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODC bit
at the rising edge of RESET. The BKGD pin has an internal pull-up device.
1.7.2.4
PAD[5:0] are general-purpose input or output signals. The signals can be configured on per signal basis as
interrupt inputs with wake-up capability (KWAD[5:0]).These signals can have a pull-up or pull-down
device selected and enabled on per signal basis. Out of reset the pull devices are disabled.
1.7.2.5
PE[1:0] are general-purpose input or output signals. The signals can have pull-down device, enabled by a
single control bit for this signal group. Out of reset the pull-down devices are enabled.
1.7.2.6
PP[5:0] are general-purpose input or output signals. The signals can be configured on per signal basis as
interrupt inputs with wake-up capability (KWP[5:0]). PP[2] has a high current drive strength and an
over-current interrupt feature. They can have a pull-up or pull-down device selected and enabled on per
signal basis. Out of reset the pull devices are disabled.
1.7.2.7
PS[5:0] are general-purpose input or output signals. They can have a pull-up or pull-down device selected
and enabled on per signal basis. Out of reset the pull-up devices are enabled.
32
Detailed Signal Descriptions
RESET — External Reset Signal
TEST — Test Pin
BKGD / MODC — Background Debug and Mode Pin
PAD[5:0] / KWAD[5:0] — Port AD Input Pins of ADC
PE[1:0] — Port E I/O Signals
PP[5:0] / KWP[5:0] — Port P I/O Signals
PS[5:0] — Port S I/O Signals
The TEST pin must be tied to ground in all applications.
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
NOTE
Rev. 2.2
Freescale Semiconductor