UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 115

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
22.4
22.4.1
22.5
22.5.1
22.5.2
22.5.3
20. The MCU cannot invoke these instructions while executing code from the same Flash memory as that for
Power-down instruction and Power-up mode
Power-up mode
The PSD module internal logic is reset upon Power-up to the READ mode. Sector Select
(FS0-FS7 and CSBOOT0-CSBOOT3) must be held Low, and WRITE Strobe (WR, CNTL0)
High, during Power-up for maximum security of the data contents and to remove the
possibility of a byte being written on the first edge of WRITE Strobe (WR, CNTL0). Any
WRITE cycle initiation is locked when V
Read
Under typical conditions, the MCU may read the primary Flash memory or the secondary
Flash memory using READ operations just as it would a ROM or RAM device. Alternately,
the MCU may use READ operations to obtain status information about a Program or Erase
cycle that is currently in progress. Lastly, the MCU may use instructions to read special data
from these memory blocks. The following sections describe these READ functions.
Read memory contents
Primary Flash memory and secondary Flash memory are placed in the READ mode after
Power-up, chip reset, or a Reset Flash instruction (see
memory contents of the primary Flash memory or the secondary Flash memory by using
READ operations any time the READ operation is not part of an instruction.
Read memory sector protection status
The primary Flash memory Sector Protection Status is read with an instruction composed of
4 operations: 3 specific WRITE operations and a READ operation (see
READ operation, address Bits A6, A1, and A0 must be '0,' '1,' and '0,' respectively, while
Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3) designates the Flash memory sector
whose protection has to be verified. The READ operation produces 01h if the Flash memory
sector is protected, or 00h if the sector is not protected.
The sector protection status for all NVM blocks (primary Flash memory or secondary Flash
memory) can also be read by the MCU accessing the Flash Protection registers in PSD I/O
space. See
Reading the Erase/Program status bits
The Flash memory provides several status bits to be used by the MCU to confirm the
completion of an Erase or Program cycle of Flash memory. These status bits minimize the
time that the MCU spends performing these tasks and are defined in
bits can be read as many times as needed.
For Flash memory, the MCU can perform a READ operation to obtain these status bits while
an Erase or Program instruction is being executed by the embedded algorithm. See
Section 22.6: Programming Flash
which the instruction is intended. The MCU must retrieve, for example, the code from the secondary Flash
memory when reading the Sector Protection Status of the primary Flash memory.
Section 22.8.1: Flash memory sector protect
memory, for details.
CC
is below V
LKO
Table
.
for register definitions.
85). The MCU can read the
Table
Table
Memory blocks
86. The status
85). During the
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